Samsung disclosed its three-phase roadmap for HBM evolution at the Hot Chips technology conference, with the ultimate goal of the zHBM architecture. This architecture aims to vertically stack DRAM directly on top of compute chips such as GPUs and TPUs, completely eliminating the 2.5D interposer. Samsung stated that compared to standard HBM4E, the zHBM solution can achieve a 70% reduction in power consumption and a 230% increase in DRAM bandwidth. The roadmap is divided into three phases: the first phase focuses on freeing up silicon area for compute chips through process upgrades; the second phase integrates memory expansion controllers and processing units on the Base Die; and the third phase, zHBM, completely reconstructs the system architecture through 3D vertical integration.