Intel's head of technology recently stated that by 2045, chips will continue to evolve towards three-dimensional stacking, with transistors, interconnects, and chip-to-chip connections all stacking upwards to enhance performance. However, each new structure requires approximately a decade to address heat dissipation and integration challenges. Intel CTO Pushkar Ranade estimates that existing global equipment is only sufficient to double advanced process wafer output, far short of the threefold increase in AI computing power demanded over the next decade. He noted that equipment orders take 18 months to arrive, new fabs will not be completed until the end of this decade, and fab costs double every 4 to 5 years, with High-NA lithography machines and supporting equipment costing approximately $400 million. Intel has learned from the lessons of the 10nm process, and future nodes will limit the number of innovations and implement "stage gates" for new technologies to ensure predictable progress. The company believes it is technologically close to TSMC but still needs to catch up in scale.